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the MC33884 switch monitor interface is a monolithic silicon integrated circuit (ic) that performs switch monitoring functions. the device provides efficient interface between electrical switches and low voltage microprocessors. the MC33884 supplies switch contact pullup and pulldown current while monitoring the input voltage level. all inputs are protected for transients when implemented with an appropriate static discharge capacitor used on the inputs. there are four modes of operation sleep , normal , polling , and polling + int timer . sleep mode reduces the current drain to a quiescent current level of 10 a and disables the ic. normal mode interrupts the microprocessor whenever any external switch changes it's open or closed state. polling mode reads a switch status periodically and interrupts the microprocessor only when an external switch is sensed as being closed. the polling + int timer mode is similar to the polling mode, with the addition of an interrupt being sent to the microprocessor if a switch is sensed closed or upon the internal interrupt timer otiming outo. an interrupt is always ultimately sent to the microprocessor in this mode. all modes of operation are easily programmed via the serial peripheral interface (spi) control. the MC33884 has the following features: ? full operation with 7.0 v v pwr 26 v, limited operation with 5.5 v v pwr 7.0 v ? input voltage range: 14 v to 40 v ? interfaces directly to microprocessors using spi protocol ? 24lead wide body soic package ? wakeup on change of monitored switch status ? programmable wetting current ? 4 programmable inputs to monitor 4 switchtobattery or 4 switchtoground switches ? 6 (fixed function) inputs to monitor 6 switchtoground switches ? 2 (fixed function) inputs to monitor 2 switchtobattery switches ? standby current during normal mode = 100 a ? quiescent current in sleep mode < 10 a ? reset (rst) input defaults the device to sleep mode ? active interrupt (int) on change of switch state in normal mode ? 4 modes of operation (sleep, normal, polling, polling + int timer) ? designed to operate 40 c t a 105 c this document contains information on a new product. specifications and information herein are subject to change without notice . order this document by MC33884/d

semiconductor technical data ? motorola, inc. 2001 rev 2 09/01 pin connections dw suffix 24 lead soic case 751e scale 1:1 1 2 3 4 5 6 7 8 9 10 11 12 23 22 21 20 19 18 17 16 15 14 13 24 csb vbg sp4 sg6 sg5 sg4 sb2 sp3 intb sync rstb sclk so si sp1 sg1 sg2 sg3 sb1 sp2 masl vpwr gnd vdd device operating temperature range package ordering information MC33884dw t a = 40 to 105 c so24 MC33884dwr2 t a = 40 to 105 c so24 f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
2 motorola tsg ic device data programmable input blocks (14) switchtoground and switchtobattery sense inputs (x4) switchtoground sense inputs (x6) switchtobattery sense inputs (x2) v dd , v+ distribution fixed input blocks gnd (16) fixed input blocks battery (12) mode control spi encode spi interface spi decode oscillator metallic or nonmetallic enable or disable input block (tristate) switchground, metallic or nonmetallic, enable or disable fib (tristate) switchbatt, metallic or nonmetallic, enable or disable fib (tristate) pib configure, fib/pib tristate fib/pib metallic mode switch status normal, polling, sleep slave sync sp1 rstb quiescent current control polling mode (to all input blocks) sp2 sp3 sp4 sg1 sg2 sg3 sg4 sg5 sg6 sb1 sb2 v v v v sync masl intb so si csb wakeup master/slave select figure 1. internal block diagram dd pwr ss bg sclk f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
3 motorola tsg ic device data figure 2. typical master / slave application mc68hcxx microcontroller parallel ports miso mosi m s b l s b MC33884 10 nf 0805 100 v 10 nf 0805 100 v 10 nf 0805 100 v 10 nf 0805 100 v 10 nf 0805 100 v 10 nf 0805 100 v 10 nf 0805 100 v 10 nf 0805 100 v 10 nf 0805 100 v 10 nf 0805 100 v 10 nf 0805 100 v 10 nf 0805 100 v v bat v bat v bat v bat v bat v bat so si rstb 10 nf 0805 100 v 10 nf 0805 100 v v dd v pwr csb intb sclk 130k 0805 v bg MC33884 10 nf 0805 100 v 10 nf 0805 100 v 10 nf 0805 100 v 10 nf 0805 100 v 10 nf 0805 100 v 10 nf 0805 100 v v bat v bat v bat v bat v bat v bat so si rstb 10 nf 0805 100 v 10 nf 0805 100 v intb sclk 130k 0805 ma sl v bg sync sync v pwr v dd csb masl v pwr v dd sb1 sb2 sp1 sp2 sp3 sp4 sg1 sg2 sg3 sg4 sg5 sg6 master node sb1 sb2 sp1 sp2 sp3 sp4 slave node reset wdog lvi reset control 10k 0805 10k 0805 t t t t t t external switches 16 bit shift register t t t t t t f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
4 motorola tsg ic device data pin function description pin name description 1 v dd 5.0 v logic supply 2 so spi data out pin 3 si spi data in pin 4 sp1 programmable switchtobattery or switchtoground input 1 (source or sink output) 5 sg1 switchtoground input 1 (source output) 6 sg2 switchtoground input 2 (source output) 7 sg3 switchtoground input 3 (source output) 8 sb1 switchtobattery input 1 (sink output) 9 sp2 programmable switchtobattery or switchtoground input 2 (source or sink output) 10 masl master or slave select pin used when multiple MC33884 devices are required in module 11 v pwr conditioned battery supply voltage 12 v ss ground 13 rstb reset input 14 sync synchronization output used when multiple MC33884 devices are required in module. provide synchronized wakeup of multiple MC33884 devices. 15 intb interrupt open drain output 16 sp3 programmable switchtobattery or switchtoground input 3 (source or sink output) 17 sb2 switchtobattery input 2 (sink output) 18 sg4 switchtoground input 4 (source output) 19 sg5 switchtoground input 5 (source output) 20 sg6 switchtoground input 6 (source output) 21 sp4 programmable switchtobattery or switchtoground input 4 (source or sink output) 22 v bg bandgap voltage. a bandgap reference is used to set up the reference and bias currents for the device. a resistor must be connected from this pin to ground. 23 csb chip select input. input with internal active pullup. requires 5.0 v cmos logic levels. communication with the device using spi is enabled when the csb pin is a logic 0. 24 sclk serial clock. sclk is used to shift data into and out of the device. it transitions 1 time per bit with an operation frequency, f sclk , with a 50% duty cycle. sclk is idle between commands and should be commanded low. f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
5 motorola tsg ic device data maximum ratings (all voltages are with respect to ground, unless otherwise noted) rating symbol value unit v dd supply voltage 0.3 to 7.0 vdc csb, si, so, sclk, rstb, masl, sync, intb (note 1) 0.3 to 7.0 vdc v pwr supply voltage (note 1) 16 to 50 vdc switch input voltage range 14 to 40 vdc recommended frequency of spi operation 3.0 mhz esd voltage (note 2) human body model (notes 3, 4, 5) machine model (note 6) v esd1 v esd2 4000 200 v storage temperature t stg 55 to 150 c operating case temperature t c 40 to 105 c operating junction temperature t j 40 to 150 c lead soldering temperature (note 7) t solder 260 c maximum junction temperature 40 to 150 c thermal resistance, junctiontoambient plastic package, 24 soic, case 751e: p ja 107 c/w notes: 1. exceeding these limits may cause malfunction or permanent damage to the device. 2. esd data available upon request. 3. esd1 testing is performed in accordance with the human body model (c zap = 100 pf, r zap = 1500 ). 4. all pins when tested individually. 5. 1 kv on v pwr and v dd when connected together. 6. esd2 testing is performed in accordance with the machine model (c zap = 100 pf, r zap = 0 ). 7. lead soldering temperature limit is for 10 seconds maximum duration. f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
6 motorola tsg ic device data static electrical characteristics (characteristics noted under conditions of 4.75 v v dd 5.25 v, 9.0 v v pwr 16 v, 40 c t c 105 c, unless otherwise noted. typical values, where applicable, reflect the parameter's approximate average value with v pwr = 13 v, t a = 25 c.) characteristic symbol min typ max units power input supply voltage range quasifunctional (note 1) fully operational v pwr(qf) v pwr(fo) 5.5 7.0 7.0 26 v supply current normal mode (i dd + i pwr ) (all switches open) i pwr(on) 100 300 a supply current sleep state (i dd(ss) + i pwr(on) ) i (ss) 2.0 10 a supply current periodic mode (polling at 3050 ms period) (all switches open) 26 a logic supply voltage v dd 4.75 5.25 v bandgap voltage output pin (tested with 130 k 0.1% resistor) v bg 1.18 1.26 1.4 v switch input pulse wetting current switch to battery i w(batt) 7.5 14 25 ma pulse wetting current switch to ground i w(gnd) 7.5 14 25 ma sustain current switch to battery i s(batt) 0.4 0.75 1.25 ma sustain current switch to ground i s(gnd) 0.4 0.75 1.25 ma tristate input current i t(swt) 10 10 a switch detection threshold i th 3.25 3.75 4.75 v switch input voltage range v in 14 40 v digital interface input logic voltage thresholds (note 2) v in(logic) 0.2 * v dd 0.7 * v dd v so high state output voltage (i oh = 1 ma) v oh(so) 3.5 v so low state output voltage (i ol = 1 ma) v ol(so) 0.4 v so tristate leakage current (csb = 0.7 v dd , v so = 0 to v dd ) i t(so) 40 40 a si pulldown current (si = v dd ) i si 5.0 35 a sclk input current (0 v = v dd ) i sclk 10 10 a csb pullup current (csb = 0 v) i csb 25 5.0 a rstb pulldown current (rstb = 0 v) i rstb 5.0 35 a intb low state output voltage (i ol = 0.5 ma) v ol(intb) 0.4 v input capacitance on sclk, si, tristate so, csb (note 3) c in 20 pf notes: 1. spi inputs and outputs are operational; fault reporting may not be fully operational within this voltage range. 2. upper and lower logic threshold voltage levels apply to si, csb, sclk, rstb, sync, masl. 3. this parameter is guaranteed by design, but not production tested f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
7 motorola tsg ic device data dynamic electrical characteristics (characteristics noted under conditions of 4.75 v v dd 5.25 v, 9.0 v v pwr 16 v, 40 c t c 105 c, unless otherwise noted. typical values, where applicable, reflect the parameter's approximate average value with v pwr = 13 v, t a = 25 c.) characteristics symbol min typ max units switch input pulse wetting current duration t pulse 30 34 43 ms interrupt delay time t int(delay) 2.5 13 ms sclk frequency vs. so load capacitance 200 pf 160 pf 120 pf f sclk 3.2 3.5 4.0 mhz digital interface timing falling edge of csb to rising edge of sclk (note 1) (required setup time) t lead 100 140 ns falling edge of sclk to rising edge of csb (required setup time) t lag 50 ns si to rising edge of sclk (required setup time) t su2 25 45 ns rising edge of sclk to si (required hold time) t h2 25 45 ns so to rising edge of sclk (required setup time) t su1 90 125 ns rising edge of sclk to falling edge of so (hold time) t h1 90 125 ns so rise time, so fall time (c l = 200 pf) t r(so) t f(so) 30 50 ns si, csb, sclk incoming signal rise time (note 2) t r(si) 50 ns si, csb, sclk incoming signal fall time (note 2) t f(si) 50 ns time from falling edge of csb to so low impedance (note 3) t so(en) 80 110 ns time for rising edge of csb to so high impedance (note 4) t so(dis) 80 110 ns time from falling edge of sclk to so data valid (note 5) t valid 65 105 ns recovery time for sequential transfers t rec 100 120 ns notes: 1. this parameter is guaranteed by design, but not production tested. 2. rise and fall time of incoming si, csb, and sclk signals suggested for design consideration to prevent the occurrence of doub le pulsing. 3. time required for output status data to be available for use at so pin. 4. time required for output states data to be terminated at so pin. 5. time required to obtain valid data out from so following the falling edge of sclk. f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
8 motorola tsg ic device data figure 3. spi timing diagram csb sclk so si t lead t wh t soen t valid t h2 t su2 t wl t su1 t h1 f sck t sodis t lag f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
9 motorola tsg ic device data circuit description introduction the MC33884 is a monolithic integrated circuit designed to interface between external electrical system switches and low voltage microprocessors via a serial peripheral interface (spi). the MC33884 monitors the open/closed status of multiple external switches used in a system. the MC33884 features 4 programmable switchtoground or battery sense inputs, 6 switchtoground sense inputs, 2 switchtobattery sense inputs, programmable wakeup timer, programmable interrupt timer, and programmable wetting current settings. all inputs are protected for esd transients when implemented with the appropriate esd capacitor. there are numerous applications for this device in aircraft, aerospace, robotic, process & control, automotive, and security systems. potential applications exist where switch status verification for safety, fault tolerant operation, or process control function purposes are critical. the MC33884 has four modes of operation: sleep, normal, polling, and polling + int timer. the MC33884 is designed to provide a robust interface between system switch contacts and a microprocessor. each MC33884 input provides the switch contact with high levels of wetting current during switch closure. after the input switch has been closed for 20 ms, the wetting current is reduced, hence reducing power dissipation in the ic. the response to a spi command will always return switch status, master/slave, int flag, and mode settings. the following section describes the programming modes and features of the MC33884. microprocessor interface the MC33884 directly interfaces to 3.3 or 5.0 v mcu. spi serial clock frequencies in excess of 5.0 mhz may be used for programming and reading switch input status. figure 4 shows the configuration between an mcu and one MC33884. 16 bit shift register mc68hcxx microcontroller receive buffer paral lel ports MC33884 to logic sclk miso so si mosi rstb cs int intb 16 bit shift regi ster figure 4. spi interface with microprocessor the MC33884, though originally designed for automotive use, is very useful in a variety of other applications, i.e., computer, telecommunications, and industrial fields. it is parametrically specified over an input battery/supply voltage of 9.0 to 16.0 v but is designed to operate over a considerably wider range of 5.5 to 26.5 v. two or more MC33884 devices may be used in a module system when implemented in a parallel or serial configuration. figure 5 and figure 6 show the parallel and serial configurations respectively. when using the serial configuration, 32 clock cycles are required for a complete transfer of data to the MC33884. 16 bit shift register mc68hcxx microcontroller parallel ports MC33884 so si rstb cs intb sclk miso mosi int MC33884 so si rstb cs intb sclk sclk figure 5. spi parallel interface with microprocessor 16 bit shift register mc68hcxx microcontroller parallel ports MC33884 so si rstb cs intb sclk miso mosi int MC33884 so si rstb cs intb sclk sclk figure 6. spi serial interface with microprocessor f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
10 motorola tsg ic device data pin functional description csb pin the system mcu selects the MC33884 to be communicated with through the use of the csb pin. with the csb in a logic low state, command words may be sent to the MC33884 via si and switch status can be received by the mcu via so. falling edge of csb enables the so output, latches the state of the intb pin, operating mode and the state of the external switch inputs. rising edge of csb disables the so driver, resets the intb pin to logic [1], activates the received command word, and allows the MC33884 to act upon new data obtained from switch inputs. to avoid any spurious data, it is essential that the hightolow and lowtohigh transition of the csb signal occur only when sclk is in a logic low state. internal to the MC33884 is an active pull up on csb. sclk pin the system clock pin (sclk) clocks the internal 16bit shift register of the MC33884. the serial input (si) data is latched into the input shift register on the rising edge of sclk signal. the serial output pin (so) shifts the switch status bits out on the falling edge of sclk. false clocking of the shift register must be avoided to guarantee validity of data. it is essential that the sclk pin be in a logic low state whenever chip select pin (csb) makes any transition. for this reason it is recommended, though not necessary, that the sclk pin be commanded to a low logic state as long as the device is not accessed (csb in logic high state). when the csb is in a logic high state, any signal on the sclk and si pin will be ignored and the so pin is tristated (high impedance). si pin this pin is used for serial instruction data input. si information is latched into the input register on the rising edge of sclk. a logic high state present at si when sclk rises, programs a [1] into the command word on rising edge of the csb signal. to program a complete word, 16 bits of information must be entered into the MC33884. internal to the ic is an active pull down on the si pin. so pin the serial output (so) pin is the output from the shift register. the so pin remains tristate until the csb pin transitions to a logic low state. all aopen switcheso are reported as [0], all `closed switches' are reported as [1]. the negative transition of csb will make status bit 15 available on so. each successive negative clock will make the next status bit available. the si/so shifting of the data follows a firstinfirstout protocol with both input and output words transferring the most significant bit (msb) first. masl pin the masl pin is required when multiple MC33884 devices are used in one module. the masl (master/slave) identifies which device will be the master and which will be the slave. master/slave identification is used during polling mode. in the polling mode the master device has it's internal oscillator running while the slave device oscillator is shutdown. when polling the master device wakes the slave via the sync pin. this feature provides minimal quiescent from v pwr and v dd pins. sync pin the sync input is used by slave ic during polling mode. the sync allows multiple MC33884 ics to poll the multiple inputs at the same time. the master controls the polling period. the slave is allowed to shut down it's oscillator to conserve current. when the slave receives the sync signal from the master, the slave starts the internal oscillator and reads the switch inputs. intb pin the intb pin is an interrupt output from the MC33884. the intb pin is an open drain output with an internal pull up. in normal mode a switch state change will trigger the intb pin. the intb pin and int bit (flag) is latched on falling edge of csb. this permits the mcu to determine the origin of the interrupt. the flag int bit in the spi word is the inverse of the intb pin. the intb pin is cleared on rising edge of csb. in polling mode the intb pin is active only during the on time (when sink and source currents are active). rstb pin the rstb pin is active low reset input to the MC33884. when asserted, the MC33884 will reset all internal registers, timers, and enter a sleep mode (with all switch inputs in a tristate condition). only an mcu spi command word will wake the MC33884 from a sleep state. the rstb pin may be controlled directly from a general purpose i/o pin or from a system/mcu reset. v bg pin the v bg pin requires a 130 k w to ground for standard wetting and sustain currents. the device is tested with a 0.1% value, but a standard 1.0% could be used for proper functionality. v pwr pin v pwr pin is battery/supply source pin for the MC33884. the v pwr pin requires external reverse battery/supply and transient protection. maximum input voltage on v pwr is 40 volts. all wetting currents and sustain currents are derived from v pwr . sp1 sp4 pins the MC33884 has 4 switch sense inputs that may be programmed to read switchtoground or switchtobattery/ supply contacts. transient battery/supply voltages greater than 40 volts must be clamped by an external device. surface mount 0805 movs and transient voltage suppressors (tvs) are available in sot23 packages. the sensed input is compared with an internal 4.0 volt reference. when programmed to sense switchtobattery, sensed voltages greater than 4.0 volts are interpreted as a closed switch. sensed voltages less than 4.0 v are interpreted as an open switch. the opposite holds true when inputs are programmed to sense switchtoground. further programming can set the wetting currents or make the inputs tristate. programming methods are provided in the following section. f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
11 motorola tsg ic device data pin functional description (continued) sb1, sb2 pins the sb pins are switchtobattery sensing inputs only. transient battery/supply voltages greater than 40 volts must be clamped by external device. surface mount 0805 movs and transient voltage suppressors (tvs) are available in sot23 packages. the sensed input is compared with an internal 4.0 volts reference. voltages greater than 4.0 volts are interpreted as a closed switch. sensed voltages less than 4.0 v are interpreted as an open switch. programming can set wetting currents or tristate the input. programming methods are provided in the following section. sg1 sg6 pins the sg pins are switchtoground inputs only. the input is compared with the internal 4.0 volt reference. voltages greater than 4.0 volts are interpreted as an open switch. voltages less than 4.0 v are interpreted as a closed switch. programming can set the wetting currents or tristate the input. programming methods are provided in the following section. functional description power up on initial power up, all MC33884 registers will be cleared and the device will enter the sleep mode. to exit sleep mode a valid command word is required to be received from the microprocessor. sleep command sleep mode can be entered by a spi sleep command or asserting the rstb pin. in sleep mode all inputs are tristate and all internal active pull up and pull down currents are disabled. sleep mode reduces the current drain to a quiescent current level of 10 m a and disables the ic. sleep mode provides lowest quiescent current for the ic. exit from sleep mode requires a valid spi run, tristate, or metallic command. run command run command places the ic in one of three operating modes; normal, polling, and polling + int timer. the command also programs the sp1 to sp4 sense inputs (switchtobattery [1] or switchtoground [0]). see table 1. normal mode is the normal operating mode of the MC33884. in normal mode the status of the input switches are latched on falling edge of csb and data is sent back to mcu via spi. all programmed combinations of source and sink currents, used for sensing purposes, are always active in this mode. in normal mode an interrupt is generated and sent to the microprocessor whenever an external switch changes its open or closed state. prior to a switch closing, the MC33884 sources 0.75 ma of sustain current. when the voltage at the input crosses the comparator threshold, 14 ma of current is allowed to flow. the 14 ma wetting current shuts off after a 20 ms timer expires. polling mode reads a switch status periodically and interrupts the microprocessor only when an external switch is sensed as being closed. if the MC33884 senses all external switches to be open, the polling mode of operation continues. if a switch is sensed closed, an interrupt is sent to the microprocessor and the MC33884 transfers it's operational mode to the normal mode. the polling mode provides a reduction in quiescent current by turning off all source and sink currents during sensed switch off periods. the polling mode allows the user to reduce quiescent current by disabling sink and source currents during swtich ooffo periods. polling + int timer mode of operation is similar to the polling mode above, with the addition of an interrupt being sent to the microprocessor if a switch is sensed closed or upon the internal interrupt timer otiming outo. an interrupt is always ultimately sent to the microprocessor in this mode. the microprocessor can be programmed to read (or ignore) the MC33884's reported switch status upon receiving the interrupt. if a switch is sensed closed, operation reverts automatically to the normal mode. if all switches are sensed open, and the wakeup timer (int timer) times out, the MC33884 continues to operate in the polling + int timer mode. the wakeup timer duration may be set much longer than the polling time. tristate command tristate command places all switch inputs into tristate. all comparators on inputs are disabled in this mode. the device will return [0] for the switch status. spi programming the MC33884 uses the spi in full duplex synchronous slave mode for communication with the microprocessor. the MC33884 is programmed via a 16 bit word command from the mcu. the word is sent to the device with the msb first. the command word sent to the MC33884 sets the mode of operation in the device. data received back from the MC33884 is the status of the sensed input switch on falling edge of csb. sixteen clock periods are required for each transmission to be valid. after the 16 clocks, csb is returned to the inactive state (logic [1]), command words are no longer accepted into si, and the so pin is tristated. the response to a spi command returns status based on previous command word. this previous command could be a hardware reset as well as any of the other commands discussed in this section. f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
12 motorola tsg ic device data programming and configuration description spi commands from microcontroller command protocol (data into si) table 1: spi command protocol msb bit lsb bit command 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 sleep [default] 0 0 0 0 x x x x x x x x x x x x run 0 0 0 1 mod2 mod1 st3 st2 st1 wt2 wt1 cp4 cp3 cp2 cp1 tristate 0 0 1 1 tg6 tg5 tg4 tg3 tg2 tg1 tp4 tp3 tp2 tp1 tb2 tb1 metallic 0 1 0 1 mg6 mg5 mg4 mg3 mg2 mg1 mp4 mp3 mp2 mp1 mb2 mb1 ic test mode 1 x x x x x x x x x x x x x x x reset values: run register eeee u u uuuuuuuuuu tristate register eeee 0 0 0000000000 metallic register e e e e u u u u u u u u u u u u u: unknown value coming out of sleep mode; must configure with run and metallic commands. note: the remaining combinations of bits [16:13] are nonfunctional (0010, 0100, 0110, 0111) label definitions mod[2:1] operating mode st[3:1] sample off time cp[4:1] configure programmable switch wt[3:1] wakeup time tg[6:1] tristate switchtoground mg[6:1] metallic switchtoground tb[2:1] tristate switchtobattery mb[2:1] metallic switchtobattery tp[4:1] tristate programmable switch mp[4:1] metallic programmable switch sleep command the sleep command places the ic in sleep mode and essentially turns off the part. by definition, a hardware reset sends/keeps the ic in sleep mode. all inputs are tristated, disabling all input blocks and all internal pullups/pulldowns. only a spi co mmand can take the ic out of sleep mode. exiting this mode requires a valid run, tristate, or metallic command. msb bit lsb bit command 1615141312111098765432 1 sleep [default] 0 0 0 0 x x x x x x x x x x x x f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
13 motorola tsg ic device data description (continued) run command the run command gives access to all of the operating modes: normal, polling, and polling + int timer. it allows selection of t wait and t wake , and configures the programmable input blocks. bit 7 is currently unused. note that the run register values are unknown after exiting the sleep mode. msb bit lsb bit command 1615141312 111098765432 1 run 0 0 0 1 mod2 mod1 st3 st2 st1 wt2 wt1 cp4 cp3 cp2 cp1 reset values: run register e e e e u u u u u u u u u u u u u: unknown value coming out of sleep mode; must configure with run command. mod[2:1] e operating mode in the run command, the two mod bits place the device in one of three operating modes: normal, polling, and polling + int timer. bit definitions for run command command: run (0001), with bits[12:1] as follows mode mod2 mod1 st[3:1] wt[2:1] cp[4:1] undefined 0 0 xxx xx xxxx normal 0 1 xxx xx cp[4:1] polling 1 0 st[3:1] xx cp[4:1] polling + int timer 1 1 st[3:1] wt[2:1] cp[4:1] st[3:1] e off time between samples (t wait ) during both polling modes (with and without int timer 'wakeup', mod2=[1]), these bits select the interval of time (t wait ) that the input blocks are turned off; switch transitions are not detected during the off interval. sample off time prescales st[3:1] multiplier selected off time, t wait (ms) [t detect (4.8ms typ.) * multiplier] on time (ms) 000 5 15 25 5.1 6.3 001 9 30 55 5.1 6.3 010 17 60 90 5.1 6.3 011 25 100 140 5.1 6.3 100 33 145 185 5.1 6.3 101 41 195 215 5.1 6.3 110 49 220 245 5.1 6.3 111 57 250 320 5.1 6.3 f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
14 motorola tsg ic device data description (continued) wt[2:1] e wakeup time these bits let the device assert an external interrupt (intb) at the following intervals during polling mode (mod2=mod1=1). wakeup delay prescales wt[2:1] multiplier selected wakeup interrupt, t wake (ms) [t detect (2.8ms typ.) * multiplier] 00 512+1 2400 3200 01 256+1 1200 1600 10 128+1 600 750 11 64+1 290 360 cp[4:1] e configure programmable switch configure the programmable inputs sp[4:1] to detect either an external switchtoground (internal current source) or an externa l switchtobattery (internal current sink). note that this configuration may be entered in any of the three valid operating mod es (see mod[2:1]) within the run command. programmable switch bit definition cpx external switch to: 0 ground 1 battery tristate command this command places an external switch into a atristateo condition, essentially disconnecting the wetting current (if the swit ch is metallic) and the sustain current. the internal inputthreshold comparator is still internally connected to its external pi n. this command does not change the mode of operation (e.g., a tristate command received while in polling mode leaves the part in that mode). note that the tristate register clears all bits to [0] (all inputs in tristate) in response to a hardware reset; all inputs also remain in tristate after exiting the sleep mode. msb bit lsb bit command 161514131211109 8 765432 1 tristate 0 0 1 1 tg6 tg5 tg4 tg3 tg2 tg1 tp4 tp3 tp2 tp1 tb2 tb1 reset values: tristate register e e e e 0 0 0 0 0 0 0 0 0 0 0 0 tg[6:1] e tristate switchtoground tb[2:1] e tristate switchtobattery tp[4:1] e tristate programmable switch tristate bit definition tgx, tbx, tpx input configured to: 0 input disabled [default] 1 input enabled f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
15 motorola tsg ic device data description (continued) metallic command this command enables the pulsed wetting current for an external metallic switch and disables it for an external nonmetallic switch. this command does not change the mode of operation (e.g., a metallic command received while in polling mode leaves the part in that mode). note that the run register values are unknown after exiting the sleep mode. msb bit lsb bit command 161514131211109 8 7654321 metallic 0 1 0 1 mg6 mg5 mg4 mg3 mg2 mg1 mp4 mp3 mp2 mp1 mb2 mb1 reset values: metallic register e e e e u u u u u u u u u u u u u: unknown value coming out of sleep mode; must configure with metallic command. mg[6:1] e metallic switchtoground mb[2:1] e metallic switchtobattery mp[4:1] e metallic programmable switch metallic switch bit definition mgx, mbx, mpx accepted switch type: 0 nonmetallic 1 metallic (enable wetting current pulse) test mode bit 16 is reserved for placing the device into a special ic test mode. it is used to confirm various internal functions. msb bit lsb bit command 1615141312111098765432 1 ic test mode 1 x x x x x x x x x x x x x x x f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
16 motorola tsg ic device data description (continued) spi responses response protocol (data out of so) table 1: spi response protocol msb bit lsb bit mode 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 reset/sleep 0 0 x x x x x x x x x x x x x x normal 0 1 masl int sg6 sg5 sg4 sg3 sg2 sg1 sp4 sp3 sp2 sp1 sb2 sb1 polling 1 0 masl x sg6 sg5 sg4 sg3 sg2 sg1 sp4 sp3 sp2 sp1 sb2 sb1 polling + int timer 1 1 masl int sg6 sg5 sg4 sg3 sg2 sg1 sp4 sp3 sp2 sp1 sb2 sb1 label definitions sg[6:1] switchtoground flag masl master/slave identification flag sb[2:1] switchtobattery flag int external interrupt flag sp[4:1] programmable switch flag reset/sleep when the reset (rstb) input is active (logic [0]), all internal registers are cleared, thereby placing the device in sleep mode and upon the rstb input returning to the inactive state (logic [1]) the MC33884 remains in sleep mode. a spi command, received from the microprocessor, is necessary to command the device out of sleep mode. msb bit lsb bit mode 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 reset/sleep 0 0 x x x x x x x x x x x x x x note: the spi response given while sending the command to exit sleep mode should be ignored due to unknown powerup state. f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
17 motorola tsg ic device data description (continued) normal and periodic bits [16:15] identify one of the three operating modes: normal, polling, and polling + int timer. the remaining bits identify t he device as the master or a slave, whether the device has an interrupt that has not been cleared, and the state of all the inputs . msb bit lsb bit mode 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 normal 0 1 masl int sg6 sg5 sg4 sg3 sg2 sg1 sp4 sp3 sp2 sp1 sb2 sb1 polling 1 0 x polling + int timer 1 1 int masl e master/slave identification flag this flag is the same as the state of the masl pin. it provides software identification of the configuration of each ic. masl bit definition masl device is a 0 slave 1 master int e external interrupt flag this flag identifies this particular ic as the initiator of an external interrupt. it is the inverse of intb. int bit definition mode bit 16 15 14 13 type of interrupt normal 0 1 x 0 nothing has happened 1 switch interrupt polling 1 0 x x polling + int ti 1 1 x 0 nothing has happened ti mer 1 wakeup interrupt sg[6:1] e switchtoground flag sb[2:1] e switchtobattery flag sp[4:1] e programmable switch flag these twelve flags indicate the state of all switch inputs: switch state bit definition sgx, sbx, spx external switch is: mode input states latched: 0 open normal at the moment csb transitions to logic 0. 1 closed polling tristate all tristate inputs have their wetting and sustain currents disabled. by definition, all disabled inputs return the following value for the switch state whenever spi data is exchanged: tristate bit definition sgx, sbx, spx external switch is: 0 tristate f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
18 motorola tsg ic device data package dimensions case 751e04 issue e notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimensions a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.13 (0.005) total in excess of d dimension at maximum material condition. a b p 12x d 24x 12 13 24 1 m 0.010 (0.25) b m s a m 0.010 (0.25) b s t t g 22x seating plane k c r x 45 m f j dim min max min max inches millimeters a 15.25 15.54 0.601 0.612 b 7.40 7.60 0.292 0.299 c 2.35 2.65 0.093 0.104 d 0.35 0.49 0.014 0.019 f 0.41 0.90 0.016 0.035 g 1.27 bsc 0.050 bsc j 0.23 0.32 0.009 0.013 k 0.13 0.29 0.005 0.011 m 0 8 0 8 p 10.05 10.55 0.395 0.415 r 0.25 0.75 0.010 0.029 f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
19 motorola tsg ic device data notes f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
20 motorola tsg ic device data motorola reserves the right to make changes without further notice to any products herein. motorola makes no warranty, represe ntation or guarantee regarding the suitability of its products for any particular purpose, nor does motorola assume any liability arising out of the applicati on or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. atypicalo para meters which may be provided in motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all ope rating parameters, including atypicalso must be validated for each customer application by customer's technical experts. motorola does not convey any license under it s patent rights nor the rights of others. motorola products are not designed, intended, or authorized for use as components in systems intended for surgical imp lant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the motorola product cou ld create a situation where personal injury or death may occur. should buyer purchase or use motorola products for any such unintended or unauthorized application, buyer shall indemnify and hold motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expens es, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized u se, even if such claim alleges that motorola was negligent regarding the design or manufacture of the part. motorola and are registered trademarks of motoro la, inc. motorola, inc. is an equal opportunity/affirmative action employer. motorola and the stylized m logo are registered in the us patent & trademark office. all other product or service names are the property of their respective owners. motorola, inc. 2001. how to reach us: usa / europe / locations not listed : motorola literature distribution; p.o. box 5405, denver, colorado 80217. 13036752140 or 18004412447 japan : motorola japan ltd.; sps, technical information center, 3201, minamiaz abu. minatoku, tokyo 1068573 japan. 8 1334403569 asia / pacific : motorola semiconductors h.k. ltd.; silicon harbour centre, 2 dai king street, tai po industrial estate, tai po, n.t., hong ko ng. 85226668334 technical information center: 18005216274 home page : http://www.motorola.com/semiconductors/ MC33884/d ? f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .

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